Binding agreement to acquire 2D Generation 

Highlights:

• Adisyn has entered into a binding agreement to acquire 100% of semiconductor IP business, 2D Generation

• Adisyn willleverage  2D  Generation’s innovativesemiconductor  solution  to  generate opportunities  in  AI1’s  target  markets  including  defence  applications,  data  centres  and cybersecurity

• 2D Generation’s semiconductor IPis a critical advancement in semiconductor technology that will enable the next generation of generative AI and semiconductor solutions for data centres and beyond

• The  semiconductor  market is  thrivingas  the  data  and  computing  power  required  for generative AI continues to grow exponentially –with the acquisitionof 2D Generation, Adisyn will be well positioned to benefit from this significant technological opportunity

• 2D Generation is a partner in the EU’s Connecting Chips Joint Undertaking with research and innovation partners including NVIDIA, IMEC, Valeo, Applied Minerals, NXP, and Unity•Completion of the previously announced $3m (before costs) capital raise

Adisyn Ltd (ASX: AI1)(“Adisyn” or the “Company”) is pleased to announce, further to its previous announcement on 23 October 2024,that it has now entered into a binding Share Purchase Agreement (“SPA”)toacquire100% of the issued share capital of 2D GenerationLtd(“2DG or 2D Generation”)(“Acquisition”).

AI1 entered into a Collaboration Agreement with2DG, a semiconductor IP business, as announced on 15 July 2024.  The companies have since continued to work together and identified significantopportunities to leverage 2D Generation’s semiconductor solutions and industry relationshipstoenhanceAI1’soffering in itstarget markets,as well asleverage each other’s business partners to improve market penetration.

Adisynis delighted to advise that the companieshave reached bindingterms for AI1to acquire 100% of the issued share capital of 2D Generation Ltd. The key terms of the Acquisition are included in Annexure A of this announcement(Share Purchase Agreement Terms).Completion of theAcquisition remainssubject to satisfaction of various Conditions Precedent outlined in Annexure A.

The Acquisition is a critical move forward for AI1’s servicesbusinessesfor data centres, managed IT, cybersecurity, and generative AI.The AcquisitionallowsAI1 and 2DG to focus on developing capital-light semiconductor IP solutions for the data centre, cybersecurity, and managed IT business segments rather than competing in the high-capital expenditure (capex) infrastructure space.Based on the Terms of the Acquisition, Adisynwill be able to progressthe development and commercialisation of 2D Generation’s unique Intellectual Property (IP).

2DG is apartner in the European Union’s Joint Undertaking, ConnectingChips, which has been specifically formed and funded to fast-track the next generation of semiconductor chips to cope with generative AI’s ever-expanding processing requirements, need for speed,and lower power consumption. 2D Generation’s solution has the potential to substantially improve the efficiency of datacentresand generative AI solutions,as well a range of other real-world technologicalapplications.It is generally accepted that the current generation of AI chips will reach their useful limits by 2030 or sooner.

Capital Raise

As announced on 23 October 2024, the Company has received firm commitments to raise$3 million(before costs) for an equity capital placement, which was subject to the entering into the SPAwhich has now been satisfied (“Capital Raise”). Theplacement raised$3,000,000 (before costs) through the issue of 60,000,000 Shares at an issue price of $0.05each (Placement Shares) together with 1 free attaching Option (exercisable at $0.075 within 3 years of Issue) for every 4Shares subscribed for and issued, representing 15,000,000 Options(Placement Options). 

The Placement Shares willbe issued utilisingthe Company’s existing placement capacity under Listing Rules 7.1(36,351,000 Shares)and 7.1A(23,649,000 Shares), and willrankparipassu with existing AI1 shares on issue.Allotment of the Placement Shares is expected to occur on or around 6November 2024. The 15,000,000 Placement Options will be issued subject to shareholder approval. 

Background to 2D Generation’s Solution

2DG have developed a patented solution allowing graphene coating at sub-300 degrees centigrade, an achievement that has never been successfully completed prior to 2DG. This opens the door to the next generation of semiconductors capable of further miniaturisation, lower power consumption, less heatand greater computational power.

2D Generation’s innovative technology centres around the aim of improving the performance and capabilities of the interconnect. 

• An interconnect in a semiconductor refers to the conductive pathways that connect different components or regions within an integrated circuit (IC). 

• These interconnects are crucial for the functionality of the IC as they facilitate the flow of electrical signals between transistors, capacitors, resistors, and other elements on the chip.

• Interconnects can be made of various materials, typically metals like aluminium or copper, and they can be implemented in different layers within the semiconductor structure.

The interconnect field has emergedas a critical technological barrier hindering industry progress. Overcoming this challenge is perceived as the “Holy Grail” within the industry, promising accelerated rates and continued miniaturisation. Industry giants recognise that the entity with a viable solution stands to gain a substantial competitive advantage. 

Despite large scale investment from major companiessuch as ASM International NV (ASMI), Tokyo Electron Limited (TEL), Lam Research Corporationand Veeco Instruments, a significant breakthroughin this domain isstill elusive.

Enter 2D Generation. With its groundbreaking innovation enabling in-situ ALD graphene deposition on the interconnect at below 300 degrees Celsius. An achievement that has never been done successfully prior to 2DG. This focus on graphene integration sets 2D Generation apart, presenting a disruptive technologythat has the potential toreshape the landscape of semiconductor manufacturing.

2D Generation has demonstrated the deposition of grapheneusing an Atomic Layer Deposition (ALD)machine.This technological breakthrough holds the potential to revolutionise production devices, enabling faster and more advanced chip manufacturing compared to competitors.2D Generation is continuing todevelop the technology with the aim of commercialising via licences with one or multiple major semiconductor manufacturers.In doing so, the developed technologies will aim to align with AI1’s dual track strategy of AI enablement and advanced data centre and cyber security solutionsincluding:

1.Innovative AI Chips: The partnership will focus on creating intellectual property for electronic photonic power and systems on chips (SoC) and their integration into systems in package (SiP) modules.

2.High-Performance Computing: Applications will target AI, data centres, high-performance computing, and other digital industries, including cybersecurity.

3.Environmental Impact: Addressing the scalability limitations and massive energy demands of semiconductors to reduce societal and environmental costs.

Why do we need the next generation of semiconductor technology?

This explosion of data and the learning data sets being applied to it means more efficientsemiconductors are critical for industry growth.

2DG have been invitedto be part of the ConnectingChips Consortium to assist in dealing with these issues.Interconnects in semiconductors are becoming a bottleneck for further increasing the processing power due to several critical factors:

1.Signal Delay and Resistance-Capacitance (RC) Effects:As semiconductors scale down to smaller nodes, the interconnects that link transistors face increased resistance and capacitance. The increased resistance causes slower signal transmission, while higher capacitance adds more delay in switching. These RC effects create significant latency and limit the overall speed of the circuit.

2.Power Consumption and Heat:The energy required to drive signals through the interconnects increases as their dimensions shrink, leading to higher power consumption and excess heat. Managing this power density is difficult, and the heat generated can negatively impact performance, further limiting processing power.

3.Electromigration:As interconnects shrink, the current density increases, making them more susceptible to electromigration, a phenomenon where atoms in the metal (commonly copper or aluminium) move due to high current, degrading the interconnect over time. This can cause circuit failure or require more conservative design, which limits performance improvements.

4.Scaling Limits:Traditional materials like copper are reaching their physical and electrical limits as semiconductor technology moves to sub-5nm processes. The resistance of copper interconnects increases as they become thinner, which cannot keep up with the demands for faster signal transmission required by high-performance processors.

5.Crosstalk and Noise:As interconnects are packed closer together, they are more susceptible to crosstalk, where signals in one interconnect affect the neighbouringones. This interference can lead to errors, reduced signal integrity, and lower performance, especially at high frequencies.

6.Complexity and Manufacturing Costs:Integrating multiple layers of interconnects in advanced nodes to mitigate some of these effects has made semiconductor manufacturing increasingly complex and costly. This additional complexity poses challenges for continuing Moore’s Law.

2DG’s patented solution addresses the above challenges in the following ways:

1.Reduced Signal Delay (RC Delay):As 2DG’s graphene coated interconnects allow further miniaturisation, the distance signals need to travel decreases. This reduces resistance and capacitance, lowering the RC delay. With shorter signal travel times, the overall speed of the circuit improves, allowing faster data processing and higher clock speeds.

2.Lower Power Consumption:Smaller graphene coated interconnects require less power to drive signals. As a result, there is less energy dissipation as heat, which improves energy efficiency and enables the development of more energy-efficient semiconductor devices, crucial for mobile and embedded systems.

3.Higher Density of Components:Shrinking graphene interconnects allows for more transistors and other components to be packed into a given area, enhancing overall device performance. This enables higher levels of integration in chips, promoting the trend of multi-core and heterogeneousarchitectures that can perform more computations in parallel.

4.Improved Signal Integrity:When graphene coated interconnects are scaled down, the risk of signal interference (crosstalk) can be reduced with improved layout designs. This leads to better signal integrity, enabling higher data transfer rates without errors, which is particularly important for high-frequency operations.

5.Enhanced Thermal Management:Smaller, more efficient graphene coated interconnects generate less heat, reducing the thermal load on the chip. Better heat management improves the reliability and lifespan of semiconductor devices, allowing for higher performance under demanding workloads.

Scaling interconnects has become a key focus in advanced semiconductor technologies, especially as traditional scaling of transistors approaches its physical limits. This is why 2DG are collaborating with the likes of Nvidia, Valeo, Applied Materials, NXP and IMEC.

 

Highlights:• Adisyn has entered into a binding agreement to acquire 100% of semiconductor IP business, 2D Generation• Adisyn willleverage  2D  Generation’s innovativesemiconductor  solution  to  generate opportunities  in  AI1’s  target  markets  including  defence  applications,  data  centres  and cybersecurity• 2D Generation’s semiconductor IPis a critical advancement in semiconductor technology that will enable the next generation of generative AI and semiconductor solutions for data centres and beyond• The  semiconductor  market is  thrivingas  the  data  and  computing  power  required  for generative AI continues to grow exponentially –with the acquisitionof 2D Generation, Adisyn will be well positioned to benefit from this significant technological opportunity• 2D Generation is a partner in the EU’s Connecting Chips Joint Undertaking with research and innovation partners including NVIDIA, IMEC, Valeo, Applied Minerals, NXP, and Unity•Completion of the previously announced $3m (before costs) capital raiseAdisyn Ltd (ASX: AI1)(“Adisyn” or the “Company”) is pleased to announce, further to its previous announcement on 23 October 2024,that it has now entered into a binding Share Purchase Agreement (“SPA”)toacquire100% of the issued share capital of 2D GenerationLtd(“2DG or 2D Generation”)(“Acquisition”).AI1 entered into a Collaboration Agreement with2DG, a semiconductor IP business, as announced on 15 July 2024.  The companies have since continued to work together and identified significantopportunities to leverage 2D Generation’s semiconductor solutions and industry relationshipstoenhanceAI1’soffering in itstarget markets,as well asleverage each other’s business partners to improve market penetration.Adisynis delighted to advise that the companieshave reached bindingterms for AI1to acquire 100% of the issued share capital of 2D Generation Ltd. The key terms of the Acquisition are included in Annexure A of this announcement(Share Purchase Agreement Terms).Completion of theAcquisition remainssubject to satisfaction of various Conditions Precedent outlined in Annexure A.The Acquisition is a critical move forward for AI1’s servicesbusinessesfor data centres, managed IT, cybersecurity, and generative AI.The AcquisitionallowsAI1 and 2DG to focus on developing capital-light semiconductor IP solutions for the data centre, cybersecurity, and managed IT business segments rather than competing in the high-capital expenditure (capex) infrastructure space.Based on the Terms of the Acquisition, Adisynwill be able to progressthe development and commercialisation of 2D Generation’s unique Intellectual Property (IP).2DG is apartner in the European Union’s Joint Undertaking, ConnectingChips, which has been specifically formed and funded to fast-track the next generation of semiconductor chips to cope with generative AI’s ever-expanding processing requirements, need for speed,and lower power consumption. 2D Generation’s solution has the potential to substantially improve the efficiency of datacentresand generative AI solutions,as well a range of other real-world technologicalapplications.It is generally accepted that the current generation of AI chips will reach their useful limits by 2030 or sooner.Capital RaiseAs announced on 23 October 2024, the Company has received firm commitments to raise$3 million(before costs) for an equity capital placement, which was subject to the entering into the SPAwhich has now been satisfied (“Capital Raise”). Theplacement raised$3,000,000 (before costs) through the issue of 60,000,000 Shares at an issue price of $0.05each (Placement Shares) together with 1 free attaching Option (exercisable at $0.075 within 3 years of Issue) for every 4Shares subscribed for and issued, representing 15,000,000 Options(Placement Options). The Placement Shares willbe issued utilisingthe Company’s existing placement capacity under Listing Rules 7.1(36,351,000 Shares)and 7.1A(23,649,000 Shares), and willrankparipassu with existing AI1 shares on issue.Allotment of the Placement Shares is expected to occur on or around 6November 2024. The 15,000,000 Placement Options will be issued subject to shareholder approval. Background to 2D Generation’s Solution2DG have developed a patented solution allowing graphene coating at sub-300 degrees centigrade, an achievement that has never been successfully completed prior to 2DG. This opens the door to the next generation of semiconductors capable of further miniaturisation, lower power consumption, less heatand greater computational power.2D Generation’s innovative technology centres around the aim of improving the performance and capabilities of the interconnect. • An interconnect in a semiconductor refers to the conductive pathways that connect different components or regions within an integrated circuit (IC). • These interconnects are crucial for the functionality of the IC as they facilitate the flow of electrical signals between transistors, capacitors, resistors, and other elements on the chip.• Interconnects can be made of various materials, typically metals like aluminium or copper, and they can be implemented in different layers within the semiconductor structure.The interconnect field has emergedas a critical technological barrier hindering industry progress. Overcoming this challenge is perceived as the “Holy Grail” within the industry, promising accelerated rates and continued miniaturisation. Industry giants recognise that the entity with a viable solution stands to gain a substantial competitive advantage. Despite large scale investment from major companiessuch as ASM International NV (ASMI), Tokyo Electron Limited (TEL), Lam Research Corporationand Veeco Instruments, a significant breakthroughin this domain isstill elusive.Enter 2D Generation. With its groundbreaking innovation enabling in-situ ALD graphene deposition on the interconnect at below 300 degrees Celsius. An achievement that has never been done successfully prior to 2DG. This focus on graphene integration sets 2D Generation apart, presenting a disruptive technologythat has the potential toreshape the landscape of semiconductor manufacturing.2D Generation has demonstrated the deposition of grapheneusing an Atomic Layer Deposition (ALD)machine.This technological breakthrough holds the potential to revolutionise production devices, enabling faster and more advanced chip manufacturing compared to competitors.2D Generation is continuing todevelop the technology with the aim of commercialising via licences with one or multiple major semiconductor manufacturers.In doing so, the developed technologies will aim to align with AI1’s dual track strategy of AI enablement and advanced data centre and cyber security solutionsincluding:1.Innovative AI Chips: The partnership will focus on creating intellectual property for electronic photonic power and systems on chips (SoC) and their integration into systems in package (SiP) modules.2.High-Performance Computing: Applications will target AI, data centres, high-performance computing, and other digital industries, including cybersecurity.3.Environmental Impact: Addressing the scalability limitations and massive energy demands of semiconductors to reduce societal and environmental costs.Why do we need the next generation of semiconductor technology?This explosion of data and the learning data sets being applied to it means more efficientsemiconductors are critical for industry growth.2DG have been invitedto be part of the ConnectingChips Consortium to assist in dealing with these issues.Interconnects in semiconductors are becoming a bottleneck for further increasing the processing power due to several critical factors:1.Signal Delay and Resistance-Capacitance (RC) Effects:As semiconductors scale down to smaller nodes, the interconnects that link transistors face increased resistance and capacitance. The increased resistance causes slower signal transmission, while higher capacitance adds more delay in switching. These RC effects create significant latency and limit the overall speed of the circuit. 2.Power Consumption and Heat:The energy required to drive signals through the interconnects increases as their dimensions shrink, leading to higher power consumption and excess heat. Managing this power density is difficult, and the heat generated can negatively impact performance, further limiting processing power.3.Electromigration:As interconnects shrink, the current density increases, making them more susceptible to electromigration, a phenomenon where atoms in the metal (commonly copper or aluminium) move due to high current, degrading the interconnect over time. This can cause circuit failure or require more conservative design, which limits performance improvements.4.Scaling Limits:Traditional materials like copper are reaching their physical and electrical limits as semiconductor technology moves to sub-5nm processes. The resistance of copper interconnects increases as they become thinner, which cannot keep up with the demands for faster signal transmission required by high-performance processors.5.Crosstalk and Noise:As interconnects are packed closer together, they are more susceptible to crosstalk, where signals in one interconnect affect the neighbouringones. This interference can lead to errors, reduced signal integrity, and lower performance, especially at high frequencies. 6.Complexity and Manufacturing Costs:Integrating multiple layers of interconnects in advanced nodes to mitigate some of these effects has made semiconductor manufacturing increasingly complex and costly. This additional complexity poses challenges for continuing Moore’s Law.2DG’s patented solution addresses the above challenges in the following ways:1.Reduced Signal Delay (RC Delay):As 2DG’s graphene coated interconnects allow further miniaturisation, the distance signals need to travel decreases. This reduces resistance and capacitance, lowering the RC delay. With shorter signal travel times, the overall speed of the circuit improves, allowing faster data processing and higher clock speeds.2.Lower Power Consumption:Smaller graphene coated interconnects require less power to drive signals. As a result, there is less energy dissipation as heat, which improves energy efficiency and enables the development of more energy-efficient semiconductor devices, crucial for mobile and embedded systems.3.Higher Density of Components:Shrinking graphene interconnects allows for more transistors and other components to be packed into a given area, enhancing overall device performance. This enables higher levels of integration in chips, promoting the trend of multi-core and heterogeneousarchitectures that can perform more computations in parallel.4.Improved Signal Integrity:When graphene coated interconnects are scaled down, the risk of signal interference (crosstalk) can be reduced with improved layout designs. This leads to better signal integrity, enabling higher data transfer rates without errors, which is particularly important for high-frequency operations.5.Enhanced Thermal Management:Smaller, more efficient graphene coated interconnects generate less heat, reducing the thermal load on the chip. Better heat management improves the reliability and lifespan of semiconductor devices, allowing for higher performance under demanding workloads.Scaling interconnects has become a key focus in advanced semiconductor technologies, especially as traditional scaling of transistors approaches its physical limits. This is why 2DG are collaborating with the likes of Nvidia, Valeo, Applied Materials, NXP and IMEC. 

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